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Synthesis of analog circuits using graph theory is very useful to develop analog CAD or EDA tool

Design and synthesis methodology of digital system is equipped with cell based design techniques like PLD, CPLD, FPGA etc., which provide reusability and programmability. Synthesis of analog circuits still lacks a proper procedure in a hierarchical manner. Graph theory is an efficient way to represent circuit network.


Synthesis of Data Completion Scripts using Finite Tree Automata

Abstract: In application domains that store data in a tabular format, a common task is to fill the values of some cells using values stored in other cells. For instance, such data completion tasks arise in the context of missing value imputation in data science and derived data computation in spreadsheets and relational databases. Unfortunately, end-users and data scientists typically struggle with many data completion tasks that require non-trivial programming expertise. This paper presents a synthesis technique for automating data completion tasks using programming-by-example (PBE) and a very lightweight sketching approach. Given a formula sketch (e.g., AVG($?_1$, $?_2$)) and a few input-output examples for each hole, our technique synthesizes a program to automate the desired data completion task. Towards this goal, we propose a domain-specific language (DSL) that combines spatial and relational reasoning over tabular data and a novel synthesis algorithm that can generate DSL programs that are consistent with the input-output examples. The key technical novelty of our approach is a new version space learning algorithm that is based on finite tree automata (FTA). The use of FTAs in the learning algorithm leads to a more compact representation that allows more sharing between programs that are consistent with the examples. We have implemented the proposed approach in a tool called DACE and evaluate it on 84 benchmarks taken from online help forums. We also illustrate the advantages of our approach by comparing our technique against two existing synthesizers, namely PROSE and SKETCH.

Pub.: 05 Jul '17, Pinned: 26 Aug '17

Gradient and passive circuit structure in a class of non-linear dynamics on a graph

Abstract: Publication date: October 2016 Source:Systems & Control Letters, Volume 96 Author(s): Herbert Mangesius, Jean-Charles Delvenne, Sanjoy K. Mitter We consider a class of non-linear dynamics on a graph that contains and generalizes various models from network systems and control and study convergence to uniform agreement states using gradient methods. In particular, under the assumption of detailed balance, we provide a method to formulate the governing ODE system in gradient descent form of sum-separable energy functions, which thus represent a class of Lyapunov functions; this class coincides with Csiszár’s information divergences. Our approach bases on a transformation of the original problem to a mass-preserving transport problem and it reflects a little-noticed general structure result for passive network synthesis obtained by B.D.O. Anderson and P.J. Moylan in 1975. The proposed gradient formulation extends known gradient results in dynamical systems obtained recently by M. Erbar and J. Maas in the context of porous medium equations. Furthermore, we exhibit a novel relationship between inhomogeneous Markov chains and passive non-linear circuits through gradient systems, and show that passivity of resistor elements is equivalent to strict convexity of sum-separable stored energy. Eventually, we discuss our results at the intersection of Markov chains and network systems under sinusoidal coupling.

Pub.: 27 Jul '16, Pinned: 26 Aug '17

Aladin: A Layout Synthesys Tool for Analog Integrated Circuits

Abstract: This paper presents a layout synthesis tool called ALADIN for analog integrated circuits. It is developed especially for analog circuit designers who can bring their special knowledge and experience into the synthesis process to create high quality layouts. The layout generation is based on relatively complex sub-circuits rather than non-optimal single devices. A flexible module generator environment is developed for designers to write and maintain technology and application independent module generators of sub-circuits. Based on the thorough study of simulated annealing and genetic algorithm applications in the analog module placement, a genetic placement approach with simulated annealing and a very fast simulated re-annealing placement approach have been developed. A two-stage placement technique is proposed. Analog module routing consists of two phases including global routing and detailed routing. The minimum-Steiner-tree based global routing can be integrated into the placement procedure to improve the routability of placement solutions. The compaction based constructive detailed routing finally realizes the layout of the whole circuit. This tool is integrated into commercial software with convenient interfaces provided. The benefit of ALADIN providing layouts comparable to expert manual ones is demonstrated with several circuits showing its competition compared to other existing tools.

Pub.: 01 Mar '06, Pinned: 26 Aug '17