A pinboard by
Palak Jain

I am a PhD Candidate and an electrical engineer at National University of Singapore


We are making personal power generation 'safe, clean, dependable and affordable'.

Conventional power systems are primarily passive based on alternating current (ac) and draw energy from central power stations (called as utility). However, breakthroughs in renewable energy technologies (e.g. photovoltaics), energy storage devices (e.g. Tesla’s power wall) and a variety of new controllable loads (e.g. electric car) are disrupting these conventional systems enabling personal power generation in homes. Positive, zero and super low energy buildings are few examples presenting the idea of personal power generation. Moreover, these technologies are one of the greatest resources to end energy poverty and improve energy access for emerging regions (e.g. rural and remotely located under developed areas).

Indeed, photovoltaics, batteries, fuel cells and various other technologies for personal power generation cause a rapid proliferation of direct current (dc) based energy processing through power semiconductor devices. These power semiconductor devices form power electronic based conversion circuits which enable useful energy extraction from these technologies. Moreover, they offer many advantages, for instance, very high energy conversion efficiency, flexibility and easy scalability, multi-tier controllability and re-configurability. However, one of the technical challenges in commercializing these energy networks include reliability, safety, and robustness against faults and disturbances which could cause catastrophic events (such as fire, electrocution). My research team focuses on designing such safe and robust power electronics based dc-ac energy networks which enable peace-of-mind in operation and maintenance.

One of the central approaches to achieve peace-of-mind in personal power generation is to scan, scrutinize and rectify these faults in their early stages. Thus, we design, develop and validate model-based fault diagnosis and recovery algorithms in real time for a variety of possible faults (e.g. ground faults) in these energy networks using power electronics. The pinned items on the board present some of these ideas for fault diagnostics, prognostics and recovery to enable high confidence personal power generation, for instance in photovoltaic systems.

So, whenever, you will visit this pinboard, you will be introduced to exciting and cutting-edge technologies that make energy networks in your smart home safer and more robust against failure events.



A Data-driven Situation Awareness Method Based on Random Matrix for Future Grids

Abstract: Data-driven methodologies are more suitable for a complex grid with readily accessible data when tasked with situation awareness. However, it is a challenge to turn the massive data, especially those with some spatial or temporal errors, into the driving force within tolerable cost of resources such as time and computation. This paper, based on random matrix theory (RMT), outlines a novel data-driven methodology. 1) Background information and previous work are reviewed. 2) Related to the methodology, the technical route and applied framework, data-proceeding and each procedure, evaluation system and related indicator set, and the advantages over classical methodologies are studied. Moreover, we make a comparison with the data-driven methodology based on Principal Component Analysis (PCA). 3) Related functions, including anomaly detection, spectrum test, correlation analysis, fault diagnosis and location, statistical indicator system and its visualization (i.e. 3D power map), are developed. This methodology gains insight into the large-scale interconnected grid in a more precise and natural way, it is model free requiring no knowledge about the physical model parameters. The methodology, in a flexible and holistic way, processes massive data in the form of large random matrix to depict a global but not a local picture of the system. Meanwhile, the large data dimension $N$ and the large time span $T$, from the spatial aspect and the temporal aspect respectively, benefit the engineering performance of the proposed methodology, for this paper, the robustness against unsynchronized data is highlighted.

Pub.: 17 Oct '16, Pinned: 15 Sep '17

Advanced inspection of photovoltaic installations by aerial triangulation and terrestrial georeferencing of thermal/visual imagery

Abstract: Towards tackling the evident practical challenges of fault detection and diagnosis for PV modules, especially in large-scale installations, this paper proposes two different techniques for advanced inspection mapping of PV plants; aerial triangulation and terrestrial georeferencing. The former uses data of aerial thermal/visual imagery of operating PV modules, obtained by an unmanned aerial vehicle (UAV), to generate static “inspection maps”, in the form of true orthophoto mosaics. On the other hand, georeferencing is used to associate terrestrial thermal/visual imagery, obtained at distinct positions in a PV plant, with geographic data. By such way, inspection is based on a dynamic virtual map of the installation. Both mapping techniques were tested in two grid-connected PV systems, of a total installed power of 70.2 KWp. Several defective modules were easily and accurately detected, typically as abnormal temperature profiles, in the infrared (IR) spectrum. In addition, specific thermal image patterns of operating modules, were validated and quantified by additional diagnostic measurements, and were assigned to possible fault types. On the basis of the experience feedback, the potential of the proposed techniques and their limitations, for further application to PV plants of larger scale, are also discussed.

Pub.: 22 Oct '16, Pinned: 15 Sep '17

A remote supervision fault diagnosis meter for photovoltaic power generation systems

Abstract: The main purpose of this paper is to develop a fault diagnostic meter for photovoltaic (PV) power generation systems. First, Solar Pro software package is used for a photovoltaic power generation system analysis, and then the power generation data of photovoltaic modules during normal operations and during malfunctions is collected. Then, this paper establishes a photovoltaic power generation system fault diagnosis method based on extension theory. The power generation data collected previously is used to construct a matter-element model for PV generation systems during normal operations and during malfunction. This matter-element model and the PV power generation system fault diagnosis program are implemented using a PIC microcontroller. The PV power generation system fault diagnosis based on extension theory discussed previously requires only small amounts of data in order to construct matter-element models for normal operations and different fault situations. This diagnosis method does not require learning procedures to be used in fault diagnosis of PV power generation systems. Moreover, the method provided high accuracy. As PV power generation systems are typically installed on outdoor roofs, this paper also utilizes the ZigBee wireless sensor network transmission technology to transmit the power generation data of outdoor PV power generation systems to the PIC microcontroller in order diagnose malfunctions in PV power generation systems in real time. Finally, testing results were used to ascertain the feasibility of the PV power generation fault diagnosis meter discussed in this paper.

Pub.: 09 Mar '17, Pinned: 15 Sep '17

Fast switch fault diagnosis for PWM DC–DC low power converters

Abstract: In this paper, a fast switching fault diagnostic scheme is proposed for low-power pulse width modulation (PWM) DC–DC converters operating in different conduction modes. The outstanding feature of the proposed scheme is that no additional sensing circuits are needed. This is achieved by using the differential of output ripple voltage and the switch gate driver signal for diagnosis. Since the output voltage has to be normally measured for control purposes and the PWM signals are known to the controller, no additional sensors are needed in the proposed scheme. Moreover, based on the real-time output voltage measurement and switch gate driver signal, the characteristics of switch open- and short-circuit faults can be rapidly extracted, specifically, in less than one switching cycle. Besides, the fault detection scheme can be implemented by a low-cost logical hardware circuit, which can be integrated into the control unit. The fault diagnosis principle, design considerations, and implementation of the detection scheme are discussed in this paper. Experimental results show that the fault detection system can detect the switching fault in four-tenths of the switching period. Besides, the proposed method can be used in the applications where the output voltage ripple rate is more than 4%, which covers most situations. © 2017 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.

Pub.: 12 May '17, Pinned: 15 Sep '17

FASHION: Fault-Aware Self-Healing Intelligent On-chip Network

Abstract: To avoid packet loss and deadlock scenarios that arise due to faults or power gating in multicore and many-core systems, the network-on-chip needs to possess resilient communication and load-balancing properties. In this work, we introduce the Fashion router, a self-monitoring and self-reconfiguring design that allows for the on-chip network to dynamically adapt to component failures. First, we introduce a distributed intelligence unit, called Self-Awareness Module (SAM), which allows the router to detect permanent component failures and build a network connectivity map. Using local information, SAM adapts to faults, guarantees connectivity and deadlock-free routing inside the maximal connected subgraph and keeps routing tables up-to-date. Next, to reconfigure network links or virtual channels around faulty/power-gated components, we add bidirectional link and unified virtual channel structure features to the Fashion router. This version of the router, named Ex-Fashion, further mitigates the negative system performance impacts, leads to larger maximal connected subgraph and sustains a relatively high degree of fault-tolerance. To support the router, we develop a fault diagnosis and recovery algorithm executed by the Built-In Self-Test, self-monitoring, and self-reconfiguration units at runtime to provide fault-tolerant system functionalities. The Fashion router places no restriction on topology, position or number of faults. It drops 54.3-55.4% fewer nodes for same number of faults (between 30 and 60 faults) in an 8x8 2D-mesh over other state-of-the-art solutions. It is scalable and efficient. The area overheads are 2.311% and 2.659% when implemented in 8x8 and 16x16 2D-meshes using the TSMC 65nm library at 1.38GHz clock frequency.

Pub.: 08 Feb '17, Pinned: 30 Aug '17

A voltage mode buck DC–DC converter with automatic PWM/PSM mode switching by detecting the transient inductor current

Abstract: This paper presents a voltage mode buck DC–DC converter that integrates pulse-width modulation (PWM) and pulse-skipping modulation (PSM) to achieve high efficiency under heavy and light load conditions, respectively. Automatic mode-switching is implemented simply by detecting the voltage drop of high-side power switch when it is on, which indicates the transient current flowing through the inductor. Unlike other methods based on average current sensing, the proposed auto-mode switching scheme is implemented based on voltage comparison and simple control logic circuit. In order to avoid unstable mode switching near the load condition boundary, the mode switching threshold voltage is set differently in PWM and PSM mode. Besides, a 16-cycle counter is also used to ensure correct detection of the change in the load condition and fast response of the converter. In addition, a dual-path error amplifier with clamp circuit is also adopted to realize loop compensation and ensure 100 % duty cycle operation. Fabricated in a 0.18-μm standard CMOS technology, the DC–DC converter is able to operate under supply voltage from 2.8 to 5.5 V with 3-MHz clock frequency. Measurement results show that the converter achieves a peak efficiency of 93 %, and an output voltage ripple of less than 40 mV, while the chip area is 1.02 mm2.

Pub.: 31 May '14, Pinned: 30 Aug '17