Circuit-Level ESD Protection Simulation Using Behavior Models in 28nm CMOS

Last updated 29th Jun 2017
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A pinboard by Feilong Zhang

257 W Big Springs Road, Riverside, CA, USA, University of California, Riverside

PINBOARD SUMMARY

Lack of accurate ESD device models and CAD methods makes on-chip ESD protection circuit design optim

Electrostatic discharge (ESD) is the sudden flow of electricity between two electrically charged objects caused by contact, an electrical short, or dielectric breakdown. A buildup of static electri...