Visualization of VHDL-based Simulations as a Pedagogical Tool for Supporting Computer Science Education

Research paper by Godofredo R. Garay, Andrei Tchernykh, Alexander Yu. Drozdov, Sergey N. Garichev, Sergio Nesmachnow, Moisés Torres-Martinez

Indexed on: 09 Apr '17Published on: 06 Apr '17Published in: Journal of Computational Science


Communication between information processing systems becomes a challenge, especially in the “big data” era. It is a mandatory subject in the topic “Architecture and organization” of the computer science curriculum. However, in our experience, it is a rather complex topic for students. Simulation visualization can be used to graphically illustrate various concepts of computer science. In this paper, we present the application of NICSim-vhd, which is an acronym for VHDL-based Network Interface Card simulation model, as a pedagogical tool for supporting undergraduate computer science students’ education. NICSim-vhd allows simulating the network-to-memory data path at a network node and generating Value Change Dump (VCD) files for simulation visualization of hardware description languages-based models. We provide a taxonomy of learner engagement with simulation visualization. Grounded in Bloom’s well recognized taxonomy of understanding, we suggest how to assess the learning outcomes to which such engagement may lead.

Figure 10.1016/j.jocs.2017.04.004.0.jpg
Figure 10.1016/j.jocs.2017.04.004.1.jpg
Figure 10.1016/j.jocs.2017.04.004.2.jpg