Imported: 29 Mar '17 | Published: 10 Nov '11
USPTO - Utility Patents
In one embodiment, a method includes receiving, at a filter comprising a Miller amplifier, a differential data signal output by a limiting amplifier (LA), the data signal comprising an output direct current (DC) offset resulting at least in part from a threshold-adjustment signal applied to the LA or an intrinsic DC offset caused by physical characteristics of the LA. In one embodiment, the method additionally includes generating a compensation signal based on the threshold-adjustment signal, a polarity of the compensation signal being opposite a polarity of the threshold-adjustment signal or the DC offset, a magnitude of the compensation signal being a function of the magnitude of the threshold-adjustment signal. In one embodiment, the method further includes introducing the compensation signal to an internal node of the Miller amplifier to compensate for the DC offset to keep one or more amplifier stages of the Miller amplifier in their linear operating regions.
This disclosure relates generally to cancelling or compensating for direct current (DC) offset in amplifying circuits.
In an integrated limiting amplifier (LA), a large resistance/capacitance (RC) low-pass filter is typically utilized to sense and extract the LA's direct current (DC) offset. The DC offset may have one or more contributions including an intrinsic DC offset that arises due to mismatches in the dimensions or doping characteristics of the LA's constituent transistors, among other possibilities. The output of the filterthe DC offsetis fed back to the LA's input stage in negative feedback to cancel or compensate for the DC offset. Typically, industry specifications dictate that the time constant of the filter be very large (e.g., in the tens of kilohertz (kHz)) such that the low-frequency cutoff of the LA is sufficiently low so that the LA can tolerate long strings of consecutive identical digits (CIDs) without introducing baseline wander (also referred to as DC drift) into the LA output signal. Consequently, the filter capacitance (C) must be large, often in the microfarad range. Achieving such a large capacitance on-chip would require a very large chip (e.g., silicon chip) area. Such a required area is expensive and often unfeasible.
Thus, to produce the large required capacitance in a smaller and achievable silicon chip area, the filter's capacitor is often enclosed in a negative feedback loop to increase the effective capacitance of the filter, a well-known technique referred to as the Miller effect. The feedback loop, also referred to as the Miller loop, generally comprises one or more voltage amplifiers (referred to collectively as the Miller amplifier). Specifically, using the Miller amplifier, the capacitance of the filter may be increased by a factor of 1+AV, where AV is the total voltage gain of the Miller amplifier. The amplifiers of the Miller loop (i.e., the Miller ampliefier) should remain in their linear operating regions in order to realize the desired capacitance amplification. If the amplifiers become non-linear, the gain AV decreases, and consequently so too does the amplified capacitance of the filter.
Particular embodiments relate to an electronic circuit, device, system, or method for maintaining loop linearity in a low-pass filter used in an integrated limiting amplifier (LA) circuit in the presence of an intrinsic DC offset in the LA circuit or a DC offset resulting from a threshold adjustment (also known as a slice-level adjustment) in the LA circuit. Particular embodiments relate to a low-pass filter in an LA circuit that includes a Miller amplifier (or Miller loop) to amplify the capacitance of the low-pass filter. In particular embodiments, a current of opposite polarity as an applied threshold-adjustment current is injected into an internal node of the Miller loop to maintain linearity in the Miller loop. In particular embodiments, the magnitude of the current injected into the Miller loop is a statically-predetermined or dynamically-determined fraction of the magnitude of the threshold-adjustment current. In particular embodiments, the capacitance amplification by the Miller loop is maintained irrespective of the magnitude of the DC offset in the LA circuit. In particular embodiments, by maintaining the loop linearity, and thus the capacitance amplification in the low-pass filter, the low-frequency cutoff specification of the LA circuit is ensured to be met across operating conditions regardless of the intrinsic DC offset or threshold adjustment.
Particular embodiments relate to an LA circuit within a deserializer utilized in optical communication. However, alternative embodiments may be utilized in other specific applications and for non-optical communication (e.g., hard-wired communication using electrons), where appropriate. Particular embodiments may be utilized in high-speed communication systems (e.g., data bit rates greater than 10 Gigabits per second (Gb/s)) and in even more particular embodiments, in communication system having data rates at or exceeding 20 Gb/s or 40 Gb/s. Additionally, as used herein, or may imply and as well as or; that is, or does not necessarily preclude and, unless explicitly stated or implicitly implied.
FIG. 1 illustrates an example LA circuit architecture 100 (LA 100) that includes an amplification circuit 102, a low-pass filter circuit 104 (LPF 104), a threshold-adjust current generator 106, and a feedback amplifier circuit (AFB) 108. In one example embodiment, LA 100 is configured to process data streams having data rates of 20 Gb/s. In particular embodiments, LA 100 receives a differential input data signal from a transimpedance amplifier. In particular embodiments, the differential input data signal has a data rate of approximately 20 Gb/s and comprises a first input data signal (stream) component DIN and a second input data signal (stream) component DINX (where DINX is the complement of DIN). In particular embodiments, LA 100 outputs a differential output data signal that has the same data rate as the input data signal and that comprises a first output data signal (stream) component DOUTX and a second output data signal (stream) component DOUTX (where DOUTX is the complement of DOUT).
In particular embodiments, threshold-adjust current generator 106 is configured to receive a threshold-adjustment input signal THADJ (or as will be described below, a signal based on the threshold-adjust input signal) that threshold-adjust current generator 106 uses to determine and output a threshold-adjustment (or slice-adjustment) output signal ITH that is then fed to AFB 108. AFB 108 then generates differential feedback voltage signal VFB and VFBX (where VFBX is the complement of VFB) which are then fed to amplification circuit 102 to adjust the slice level of LA 100.
In particular embodiments, LPF 104 comprises a resistor, a capacitor, and a feedback loop that is enclosed around the capacitor, which is typically known as a Miller loop. The Miller loop is referred to as such as it utilizes feedback (the Miller effect) to amplify the effective capacitance of the LPF 104. As described above, to produce the large required capacitance in a smaller and achievable silicon or other chip area, a Miller loop is utilized in LPF 104 to increase by virtue of feedback the effective capacitance of the LPF 104. Specifically, using the Miller loop, the capacitance of LPF 104 may be increased by a factor of 1+AV, where AV is the total gain of the one or more amplifiers that comprise the Miller loop (referred to collectively as the Miller amplifier). The feedback loop around the Miller amplifier should remain linear in order to realize the desired capacitance amplification. If the loop becomes non-linear, the gain AV decreases, and consequently, so too does the amplified capacitance of LPF 104.
By way of background, LAs that operate in optical receivers typically include a mechanism that controls the threshold (or slice) level of the LA; that is, the decision voltage at which a data signal is determined to be a logical 1 or logical 0. The threshold level may be adjusted based on a threshold-adjustment signal to introduce an artificial offset into the LA. By way of example, if the input signal DIN to LA 100 is significantly distorted (e.g., the signal has unequal noise distributions), as illustrated in FIG. 2, a potentially large threshold adjustment VTH is required to produce the optimal signal at the output of the LA. In FIG. 2, curve 111 indicates the noise distribution for bits having logical 1 values, curve 113 indicates the noise distribution for bits having logical 0 values, line 115 indicates the default slicing threshold (i.e., midway between the logical 0 and logical 1 values), and line 117 indicates the optimal slicing threshold achieved with threshold adjustment. However, when a large threshold adjustment VTH is applied to the LA 100, and more particularly to the amplification circuit 102, a large offset will also be applied at the input to the Miller loop in LPF 104, which may cause the Miller amplifier to operate in a non-linear region and, hence, reduce the capacitance amplification. Furthermore, if LA 100 has a large intrinsic DC offset to begin with (e.g., due to device or component mismatches as described above), the offset applied to the input of the Miller loop in LPF 104 may again be of sufficient amplitude to cause the Miller amplifier to operate in its non-linear region regardless of the threshold adjustment applied to the LA. In either case, any offset present in the LAwhether intrinsic or caused by an applied threshold-adjustmentis amplified by the large total LA gain, typically, for example, from 20 to 30 decibels (dB), and subsequently appears at the input of LPF 104, negating the advantage of the Miller amplifier.
FIG. 3 illustrates a simulated frequency response of an example low-pass filter suitable for use as LPF 104 and that includes a Miller loop. As shown in FIG. 3, when the Miller amplifier of the Miller loop is operating in its linear region, the capacitance amplification may be maximized and the frequency response of the low-pass filter may follow the curve 301. As the Miller amplifier begins to saturate, the capacitance amplification is reduced and the frequency response of the low-pass filter may follow the curve 303. Lastly, when the Miller amplifier is completely saturated (or non-active), the capacitance of the low-pass filter is not amplified and the frequency response of the low-pass filter may follow the curve 305.
FIG. 4 illustrates a frequency response of an example LA circuit (e.g., LA 100) incorporating a low-pass filter (e.g., LPF 104) that includes a Miller amplifier. As shown in FIG. 4, when the Miller amplifier is operating in its linear region, the capacitance amplification may be maximized and the frequency response of the LA may follow the curve 307. As the Miller amplifier begins to saturate, the capacitance amplification is reduced and the frequency response of the LA may follow the curve 309. Lastly, when the Miller amplifier is completely saturated (or non-active), the capacitance of the low-pass filter is not amplified and the frequency response of the LA may follow the curve 311.
To further demonstrate the effect or importance of the Miller amplifier in compensating for a DC offset resulting from a threshold adjustment, FIG. 5 illustrates a plot showing the bandwidth of an example low-pass filter (e.g., LPF 104) as a function of an applied threshold-adjustment voltage VTH. As shown, the bandwidth of the low-pass filter increases (which is undesirable) as the threshold-adjustment signal's magnitude is increased (Note that although the units of the x-axis in FIG. 5 are in Volts, or more specifically in milli-Volts (mV), this is only for didactic purposes as any suitable units may be used to reflect the digital nature of the threshold-adjustment signal (e.g., an eight-bit signal THADJ[7:0]) to illustrate the behavior of the bandwidth as a function of the threshold-adjustment signal). FIG. 6 illustrates the frequency response of an example low-pass filter (e.g., LPF 104) in response to an output signal produced by an example LA whose threshold level has been intentionally adjusted. When a Miller loop is used to amplify the capacitance, but the Miller amplifier transitions to its saturation region, the frequency response assumes the curve 315. However, when a correction current ICORR of opposite polarity as the threshold-adjustment current ITH is applied to maintain the linearity in the Miller loop, as described below with reference to FIGS. 9-11, the frequency response assumes the curve 317 as the correction current ICORR functions to restore the Miller amplification and thus, also the filter's bandwidth, in the presence of a threshold adjustment.
Furthermore, FIG. 7 illustrates a plot showing an output voltage offset of an example LA circuit as a function of an applied threshold-adjustment voltage. When a threshold adjustment is applied to the LA 100, or more particularly Amplification Circuit 102, an offset appears at the output of the LA, which is the input of the low-pass filter 104. The size of the offset depends on the input swing; that is, for a given threshold-adjustment magnitude, the smaller the input swing, the larger the offset. As the offset increases, the gain AV of the Miller amplifier will be reduced causing the filter's bandwidth to increase (which is undesirable).
FIG. 8 illustrates an example circuit embodiment of LA 100 that includes amplification circuit 102, LPF 104, threshold-adjust current generator 106, and AFB 108. In the illustrated embodiment, amplification circuit 102 includes eight current mode logic (CML) voltage gain stages 210, input-termination resistors 212, a binary-to-thermometer decoder 218, and a signal strength indicator circuit 220. In the illustrated embodiment, the first gain stage 210 is split into two differential stages 210a and 210b that receive various inputs including compensating signals VFB and VFBX output from AFB 108.
FIG. 9 illustrates an example circuit embodiment of LPF 104. In particular embodiments, LPF 104 is a RC filter where the capacitors 222 are enclosed in a Miller feedback loop to amplify their effective capacitance. The capacitance seen at the input of the feedback loop is CIN=(1+AV)C, where AV is the total voltage gain of the Miller amplifier (i.e., those amplifiers enclosed in the Miller feedback loop), which, in the illustrated embodiment, is A1*A2 where A1 and A2 are the gains of the amplifiers 224 and 226, respectively (in one example, A1=A2=16 dB). Hence, the RC time constant of LPF 104 is 2*R*(1+AV)C, where C is the capacitance of each of the capacitors 222 and R is the resistance of each of the resistors 228. In an example embodiment, the capacitors 222 are implemented using arrays of unit-sized P-poly capacitor fingers and the amplifiers 224 and 226 are resistively-loaded CML amplifiers. In an example embodiment, R=107 kiliohms (k) and C=160 picofarads (pF).
In the illustrated embodiment, LPF 104 additionally includes nmos (n-type metal-oxide-semiconductor field effect transistor (MOSFET)) and pmos (p-type MOSFET) differential pairs 230 and 232, respectively, placed between the two gain stages 224 and 226. Differential pair 230 is biased by an nmos current source 238 and differential pair 232 is biased by a pmos current source 240. The magnitudes of current sources 238 and 240 are equal. In particular embodiments, the differential pairs 230 and 232 inject feedback compensation signals ICORR
Hence, the differential pairs 230 and 232, having gate voltages dir and dirx (the complement of dir) that are digital signals that control the polarity of the ICORR current injection, inject the currents ICORR
In the illustrated embodiment, the magnitudes of ICORR
As described above, the injected currents ICORR
The common-mode voltage WCM and the DC voltage signals VFB and VFBX are then fed back to the LA input as illustrated in FIG. 8. In particular, the DC voltage signals VFB and VFBX are the signals against which the LA inputs are compared in the first stage (comprising stages 210a and 210b) of the amplification circuit 102. It should be noted that, in contrast to the common-mode voltage VCM, the magnitudes of the DC voltage signals VFB and VFBX do depend on the magnitude of ITH. For example, if dir is a logic high and dirx is a logic low, the left nmos transistor 252 in differential pair 242 will steer the current ITH
The present disclosure encompasses all changes, substitutions, variations, alterations, and modifications to the example embodiments herein that a person having ordinary skill in the art would comprehend. Similarly, where appropriate, the appended claims encompass all changes, substitutions, variations, alterations, and modifications to the example embodiments herein that a person having ordinary skill in the art would comprehend.