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Information, Vol. 8, Pages 11: Four-Switch Three-Phase PMSM Converter with Output Voltage Balance and DC-Link Voltage Offset Suppression

Research paper by Fadil Hicham, Driss Yousfi, Elhafyani Mohamed Larbi, Aite Youness

Indexed on: 22 Jan '17Published on: 17 Jan '17Published in: Information



Abstract

High power quality, efficiency, complexity, size, cost effectiveness and switching losses of the direct current to alternating current (DC–AC) conversion system are crucial aspects in industrial applications. Therefore, the four-switch three-phase inverter (4S3P) has been proposed as an innovative inverter design. However, this topology has been known to have many performance limitations in the low-frequency region, because of the generation of an unbalanced voltage leading to an unbalanced current due to the fluctuation and offset of the centre tap voltage of the DC-link capacitors. Those drawbacks are investigated and solved in this paper in order to provide pure sinusoidal output voltages. The generated output voltages are controlled using proportional-integral (PI) controllers to follow the desired voltages. Furthermore, the DC-link capacitor voltage offset is mitigated by subtracting the direct component from the control reference voltage using low pass filters, where this direct voltage component provides the direct current component which leads to DC-link capacitor voltage divergence. A simulation model and experimental setup are used to validate the proposed concept. Many simulation and experimental results are carried out to show the effectiveness of the proposed control scheme.