High electron mobility InAs nanowire field-effect transistors.

Research paper by Shadi A SA Dayeh, David P R DP Aplin, Xiaotian X Zhou, Paul K L PK Yu, Edward T ET Yu, Deli D Wang

Indexed on: 03 Jan '07Published on: 03 Jan '07Published in: Small


Single-crystal InAs nanowires (NWs) are synthesized using metal-organic chemical vapor deposition (MOCVD) and fabricated into NW field-effect transistors (NWFETs) on a SiO(2)/n(+)-Si substrate with a global n(+)-Si back-gate and sputtered SiO(x)/Au underlap top-gate. For top-gate NWFETs, we have developed a model that allows accurate estimation of characteristic NW parameters, including carrier field-effect mobility and carrier concentration by taking into account series and leakage resistances, interface state capacitance, and top-gate geometry. Both the back-gate and the top-gate NWFETs exhibit room-temperature field-effect mobility as high as 6580 cm(2) V(-1) s(-1), which is the lower-bound value without interface-capacitance correction, and is the highest mobility reported to date in any semiconductor NW.