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Circuit simulating a diode

Imported: 23 Feb '17 | Published: 22 Oct '02

Arian M. Jansen

USPTO - Utility Patents

Abstract

A circuit simulating the function of a diode in the sense that it conducts current in one direction and blocks current in the opposite direction, but which has a low forward voltage drop. A voltage comparator and a three terminal switch are connected so that the intrinsic reverse diode associated with the switch is harnessed to conduct current in the direction in which it is desired to conduct current and to block current in the direction in which it is desired to block current. A voltage comparator controls the control terminal of the three terminal switch to turn on the switch to conduct current and to interrupt current. Alternate embodiments of voltage comparators are disclosed. The voltage comparator may include charging and discharging transistors so that the switch turns on and off at a high speed. The invention further includes a method of conducting current in one direction and blocking current in a second direction which reduces power losses.

Description

The above and other objects, aspects, features and advantages of the invention will be more readily apparent from the description of the preferred embodiments thereof taken into conjunction with the accompanying drawings and appended claims.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention is illustrated by way of example and not limitation in the figures of the accompanying drawings in which like references denote like or corresponding parts and in which:

FIG. 1A is an electrical model of a unidirectional mechanical device employing a simulation for a diode in accordance with the prior art;

FIG. 1B is a diagram showing an intrinsic diode associated with a MOSFET for analysis of the circuit of FIG. 1A;

FIG. 2 is a circuit simulating a diode in accordance with the invention employing an n-channel enhancement MOSFET;

FIG. 3 is a circuit simulating a diode in accordance with another embodiment of the invention employing a p-channel enhancement MOSFET;

FIG. 4 is the circuit of FIG. 2 with malfunction detection means and a malfunction indicator added in accordance with another embodiment of the invention;

FIG. 5A is a circuit simulating the function of a diode employing an npn bipolar transistor in accordance with another embodiment of the invention;

FIG. 5B is a circuit simulating the function of a diode employing a pnp bipolar transistor in accordance with another embodiment of the invention;

FIG. 6 is the circuit of FIG. 5A with malfunction detection means and a malfunction indicator added in accordance with another embodiment of the invention;

FIG. 7 is the circuit of FIG. 2 modified to employ an alternate voltage comparator in accordance with another embodiment of the invention;

FIG. 8 is the circuit of FIG. 2 modified to employ another alternate voltage comparator in accordance with yet another embodiment of the invention;

FIG. 9 is a circuit of the present invention similar to that of FIG.

7 and showing a MOSFET with an intrinsic internal capacitance; and

FIG. 10 is a circuit of the present invention similar to that of FIG.

9 and showing a charging transistor for the internal capacitor of the MOSFET.

Claims

1. A circuit for improving switching performance of a three terminal switch comprising:

2. A circuit according to claim 1 wherein said means for amplifying responds to voltages at the source and drain of the switch and establishes a switching time of said switch.

3. A circuit according to claim 1 wherein said means for amplifying the current comprises a transistor.

4. A circuit according to claim 3 wherein said transistor has an emitter, collector and base; said modification of said charged state takes place across said collector and emitter; and said base controls said amplification of current in synchronisation with the switching of the three terminal switch.

5. A circuit according to claim 1 wherein said means for amplifying the current amplifies a charging current and a discharging current alternately.

6. A circuit according to claim 5 wherein said means for amplifying the current comprises a first transistor for controlling charging and a second transistor for controlling discharging of said capacitance.

7. A method according to claim 1 wherein amplifying the current charges and discharges the internal capacitance.

8. A circuit with two terminals A and K, which conducts current in one direction from terminal A to terminal K and blocks current in an opposite direction from terminal K to terminal A, comprising:

9. A circuit according to claim 8 wherein said current amplification means in order to negate the effects on switching time of the switching means due to said internal capacitance establishes a switching time in response to voltages at the source and drain of said switch.

10. A circuit according to claim 9 wherein said current amplification means consists of two transistors.