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Circuit for amplifying and outputting audio signals

Imported: 23 Feb '17 | Published: 22 Oct '02

Masashi Oki, Kazuhiro Okamoto

USPTO - Utility Patents

Abstract

A circuit for amplifying and outputting a pulse width modulated (PWM) signal corresponding to an input audio signal with at least one output transistor and at least one protection control circuit. The protection control circuit compares a detected voltage and a threshold voltage. The detection voltage is a potential difference between a source and a drain of the output transistor. When the detection voltage exceeds the threshold voltage, the protection control circuit outputs a short circuit detection signal to the gate of the output transistor. As a result, the output transistor is turned OFF.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram showing an entire structure of a circuit for amplifying and outputting audio signals according to a first embodiment of the present invention;

FIG. 2 is a circuit diagram including a protection control circuit shown in FIG. 1;

FIG. 3 is a timing chart showing operation of the protection control circuit shown in FIG. 2;

FIG. 4 is a circuit diagram showing one example of a comparator shown in FIG. 2;

FIG. 5 is a diagram showing a structure of a modification of the circuit for amplifying and outputting audio signals shown in FIG. 1;

FIG. 6 is a circuit diagram showing a detailed structure of the comparator shown in FIG. 2;

FIG. 7 is a circuit diagram showing a structure of one example of a comparator of a circuit for amplifying and outputting audio signals according to a second embodiment of the invention;

FIG. 8 is a circuit diagram showing a structure of one example of the comparator of the circuit for amplifying and outputting audio signals according to the second embodiment of the invention;

FIG. 9 is a diagram showing a structure of a protection control circuit of a circuit for amplifying and outputting audio signals according to a third embodiment of the invention;

FIG. 10 is a timing chart showing operation of the protection control circuit shown in FIG. 9;

FIG. 11 is a diagram showing a structure of a protection control circuit of a circuit for amplifying and outputting audio signals according to a fourth embodiment of the invention;

FIG. 12 is a circuit diagram showing a detailed structure of a clock generator circuit shown in FIG. 11;

FIG. 13 is a flowchart showing operation of the clock generator circuit shown in FIG. 11;

FIG. 14 is a circuit diagram showing a structure of a clock generator circuit of a circuit for amplifying and outputting audio signals according to a fifth embodiment of the invention;

FIG. 15 is a diagram showing a structure of a circuit for amplifying and outputting audio signals according to a sixth embodiment of the invention;

FIG. 16 is a diagram showing an entire structure of a conventional circuit for amplifying and outputting audio signals; and

FIG. 17 is a timing chart showing one example of a 1 bit data string and an amplified and output signal output from a PWM pulse generator circuit shown in FIG.

16.

Claims

1. A circuit for amplifying and outputting a pulse width modulated (PWM) signal corresponding to an input audio signal, said circuit comprising:

2. The circuit according to claim 1, including a plurality of said output transistors, wherein each output transistor is connected to said comparing unit and said transistor protection control unit.

3. The circuit according to claim 2, wherein said transistor protection control unit turns OFF all of said output transistors when said comparing unit outputs the stop signal.

4. The circuit according to claim 1, wherein said transistor protection control unit includes:

5. The circuit according to claim 1, wherein said comparing unit includes:

6. The circuit according to claim 1, further comprising:

7. The circuit according to claim 6, further comprising a clock generator circuit which generates a clock and outputs the clock as a clock signal of said first and second counting units when a pulse width of the PWM signal is at least equal to a first width, based on the PWM signal and a logical product signal which is a logical multiplication of the PWM signal and a delayed PWM signal obtained by delaying the PWM signal, a clock being generated when a pulse width of the PWM signal is at least equal to a second width.

8. The circuit according to claim 7,

9. The circuit according to claim 7,

10. The circuit according to claim 1, further comprising a third counting unit which counts the self-induction oscillator clock or an independent self-induction oscillator clock when the stop signal is output from said comparing unit, wherein said third counting unit outputs the stop signal output to said transistor protection control unit when a count of said third counting unit exceeds a third value.

11. The circuit according to claim 1, wherein said latch circuit, said second counting unit, and said third counting unit reset latch processing or counting based on a received release signal.