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Carbon nanotube complementary wrap-gate transistors.

Research paper by Aaron D AD Franklin, Siyuranga O SO Koswatta, Damon B DB Farmer, Joshua T JT Smith, Lynne L Gignac, Chris M CM Breslin, Shu-Jen SJ Han, George S GS Tulevski, Hiroyuki H Miyazoe, Wilfried W Haensch, Jerry J Tersoff

Indexed on: 04 May '13Published on: 04 May '13Published in: Nano Letters



Abstract

Among the challenges hindering the integration of carbon nanotube (CNT) transistors in digital technology are the lack of a scalable self-aligned gate and complementary n- and p-type devices. We report CNT transistors with self-aligned gates scaled down to 20 nm in the ideal gate-all-around geometry. Uniformity of the gate wrapping the nanotube channels is confirmed, and the process is shown not to damage the CNTs. Further, both n- and p-type transistors were realized by using the appropriate gate dielectric-HfO2 yielded n-type and Al2O3 yielded p-type-with quantum simulations used to explore the impact of important device parameters on performance. These discoveries not only provide a promising platform for further research into gate-all-around CNT devices but also demonstrate that scalable digital switches with realistic technological potential can be achieved with carbon nanotubes.