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A High-Speed and Low-Power Multistate Memory Based on Multiferroic Tunnel Junctions

Research paper by Weichuan Huang, Wenbo Zhao, Zhen Luo, Yuewei Yin, Yue Lin, Chuangming Hou, Bobo Tian, Chun‐Gang Duan, Xiao‐Guang Li

Indexed on: 14 Mar '18Published on: 13 Mar '18Published in: Advanced Electronic Materials



Abstract

Ferroic-order-based devices are emerging as alternatives to high density, high switching speed, and low-power memories. Here, multi-nonvolatile resistive states with a switching speed of 6 ns and a write current density of about 3 × 103 A cm−2 are demonstrated in crossbar-structured memories based on all-oxide La0.7Sr0.3MnO3/BaTiO3/La0.7Sr0.3MnO3 multiferroic tunnel junctions. The tunneling resistive switching as a function of voltage pulse duration time, associated with the ferroelectric domain reversal dynamics, is ruled by the Kolmogorov–Avrami–Ishibashi switching model with a Lorentzian distribution of characteristic switching time. It is found that the characteristic resistance switching time decreases with increasing voltage pulse amplitude following Merz's law and the estimated write speed can be less than 6 ns at a relatively higher voltage. These findings highlight the potential application of multiferroic devices in high speed, low power, and high-density memories.